The present disclosure relates to a display driver integrated circuit (DDI), and, more particularly, to a timing controller, a source driver, and a DDI having improved test efficiency and a method of operating the DDI.
In general, to provide a screen output, flat display apparatuses, such as a liquid crystal display (LCD), an organic light-emitting diode (OLED) display, and the like, are widely used. A flat display apparatus includes a panel in which a plurality of pixels are arranged to realize an image. A DDI provides a data signal (display data) to drive the pixels in the panel to realize an image.
The display data and various kinds of control signals can be provided to the panel through one or more links, but since an error can occur in signal transmission through the links, a bit error rate test (BERT) can be performed to check whether an error occurs in the signal transmission. For example, a panel having a large size and high resolution can have long links for transmitting signals therethrough, and in this case, the possibility of a signal transmission error can be high. However, to perform a test operation, a separate device for generating a test pattern, a separate test time, and the like, is typically required, thereby decreasing the efficiency according to the test process.